A Practical Test Patterns Generation Technique for Hardware Trojan Detection

Due to the globalization of the integrated circuit manufacturing industry, hardware Trojans constitutes an increasingly probable threat to both military and commercial applications. The Trojans being stealthy in nature, the Trojan hardware is hard to be triggered under random patterns. In this paper, we propose practical test patterns generation technique based on rare logic conditions at internal nodes. The technique increases the probability of the inserted Trojans getting triggered and detected by logic testing. Simulation results for benchmarks show that the proposed test pattern generation technique can make hardware Trojan more frequently triggered than random patterns.